AVR JTAG adapter

liyf · 发表于 2011-10-29 13:23:20

This is a modified version of the IsoJtagISP JTAGICE I clone by Andrew Leech. I added some additional buffering as well as some reversed polarity and input protection.
Note:
I never completely tested this design, while it was recognized by AVR Studio and did work I had some reliability problems. But these may have just as easily been caused by bad cables. Since I have an official JTAGICE mkII now I never used this device much. But it is pretty much the same as the original so it probably should work correctly.
Schematic

Note:
IC3D needs a pull-up (10k or something) on its enable input (pin 13) which is missing in the schematic.
PCB
I had the PCB made profesionally, also to get some experience with that. They turned out pretty well:

Soldered
The finished adapter:

As said earlier, a pull-up resistor was missing. I fixed this by soldering a 0603 10k resistor between pin 13 (enable of one of the buffers) and pin 14 (VCC) of the buffer IC:

Download
Here you can download the Eagle, Gerber and schematic files of the project. Credits for the original design go to Andrew Leech. You can freely use these files for non-commercial use.

jtagice.zip (213.66 KB, 下载次数: 10)