Are the Spartan-3/-3E I/Os 5V-tolerant? Can I drive I/O with a higher voltage?

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Spartan-3/-3E - Are the Spartan-3/-3E I/Os 5V-tolerant? Can I drive I/O with a higher voltage?


Are Spartan-3/-3E I/Os 5V-tolerant? Can I drive Spartan-3/-3E I/Os with a voltage higher than the VIH of the I/O standard?

Spartan-3/-3E I/Os have a pair of clamp diodes that connect to VCCO (VCCAUX for dedicated pins) and GND



When the input voltage is greater than VCCO +0.5V, the upper clamp diode turns on

and conducts a reverse current into the associated supply

(VCCO for nondedicated I/O; VCCAUX for dedicated I/O).

Because this reverse current can damage the I/O, the Spartan-3/-3E I/O is not 5V-tolerant.

Spartan-3/-3E I/O can be made 5V-tolerant by using an external series current-limiting resistor to limit the current into the upper clamp diode to 10 mA.

This makes the input 5V-tolerant, but an I/O configured as an output still cannot drive 5 Volts and the resulting VOH does not meet the input specifications of the 5V device.



The following is an example of how to calculate the value of the external current-limiting resistor (Rser), given the following information:

- The forward-bias voltage of the clamp diode is 0.5 V (Vd). However, the largest voltage drop across the clamp diode is determined by:

Vd = Vinx - Vccomax

where Vinx = 4.05V and is the maximum voltage to avoid oxide stress

- The limit that any I/O pin can be overdriven above or below the limits of GND and VCCO is 10 mA.

- The maximum input voltage on the input pad can be VCCO +0.5V. Vinmax - Absolute Max rating found in the Spartan-3/-3E FPGA Family
Assuming that you want to drive 5V from device "X" to the LVCMOS33 input in Spartan-3/-3E, the following are applicable:

- The VCCO min/max for the LVCMOS33 is 3.0/3.45V.

- The output voltage of the 5V device (Vsrc) is 5V +/-10%.

- The maximum voltage drop across the diode that is allowed to prevent oxide stress is Vd = 4.05V - 3.45V = 0.6V.

- Id (current through the diode when Vd = 0.6V) is 5.51mA. This value can be found in the IBIS model. The value is taken at maximum power rating I(max).

The maximum voltage difference between the 5V source and the FPGA pad is Vsrc - (Vccomax + Vd) = 5.5 - (3.45 + 0.6) = 1.45V.

To limit the current to 5.51mA (and maintain a 0.6V drop across the diode), you must have a series resistor (Rser) of 1.45/5.51mA = 263 ohm (Or 300 ohm with standard 5% resistor).

电子

学习了！谢谢，值得研究分析！